One or more embodiments relate to a method of reading a nonvolatile memory device and a method of operating a nonvolatile memory device.
Recently, there has been an increasing demand for nonvolatile memory devices which can be electrically programmed and erased and do not require the refresh function of rewriting data at specific periods. Here, an operation for filling a floating gate with electrons is called a program operation, and an operation for discharging electrons filled into the floating gate is called an erase operation.
A nonvolatile memory cell enables electrical program/erase operations and performs the program and erase operations by varying a threshold voltage when electrons are migrated by a strong electric field applied to a thin oxide layer.
The nonvolatile memory device typically includes a memory cell array in which cells for storing data are arranged in a matrix form and a page buffer for writing data into specific cells of the memory cell array or reading data stored in specific cells thereof. The page buffer includes a bit line pair connected to a specific memory cell, a register for temporarily storing data to be written into the memory cell array or reading the data of a specific cell from the memory cell array and temporarily storing the read data, a sensing node for detecting the voltage level of a specific bit line or a specific register, and a bit line selection unit for controlling whether to connect the specific bit line to the sensing node.
In the memory cells of such a nonvolatile memory device, the threshold voltage of an initial program state is ideally maintained by sustaining charges stored in the floating gate. In an actual operation, however, charges stored in the floating gate are discharged therefrom, thereby lowering the threshold voltage of the cell. A characteristic pertinent to the charge retention ability of a memory cell is called the retention characteristic of a nonvolatile memory cell. That is, a memory cell having relatively superior retention characteristic has relatively superior charge retention ability, so discharge of charges stored in the floating gate is prevented or reduced.
If this retention characteristic is poor, failure may happen when a read operation is performed because the threshold voltage is lowered. In particular, if state-based read margin for distinguishing between different states is narrow as in a multi-level cell program operation, a read failure operation may occur because of the poor retention characteristic.